1) Field of the Invention
The present invention relates to a universal serial bus (USB) device, and more particularly to a USB device that is compatible with USB 2.0 standard.
2) Description of the Related Art
Recently, USB hosts (hereinafter, “HS hosts”) that are compatible with the USB 2.0 standard, and USB devices (hereinafter, “USB 2.0 compatible devices”) that are connected to such USB hosts have come into practical use. However, some of the HS hosts are not technically compatible with the USB 2.0 standard. Accordingly, there is a requirement of USB 2.0 compatible devices that can be connected to such USB 2.0 incompatible HS hosts in a high-speed mode with transmission speed of 480 megabytes per second (Mbps).
The USB 2.0 compatible devices are connected to the USB hosts according to the standards of the hosts in the high-speed mode or a full-speed mode with transmission speed of 12 Mbps. FIG. 7 depicts a change in a USB bus when the high-speed mode is selected at the time of handshaking during reset, and FIG. 8 depicts a change in the USB bus when the full-speed mode is selected.
As shown in FIGS. 7 and 8, in an idling state in the full-speed mode, a voltage of a D+ signal of the USB bus is 3.0 volts (V), and a voltage of a D− signal thereof is 0 millivolt (mV). When this state changes into an SE0 state, a reset assertion section starts. In the SE0 state, both the D+ signal voltage and the D− signal voltage become lower than 800 mV.
A pull-up resistor is, thereafter, connected to a D+ data line, and discrimination is made whether the USB host is in a rest state or in a suspended state. When the USB host is in the reset state, a USB 2.0compatible device sets the D− signal voltage to 800 mV (chirp K). The chirp K indicates to the host that the USB 2.0 compatible device is compatible with the high-speed mode.
The USB bus again becomes in the SE0 state. This state is a transition section in which an output side of the signal is switched from the USB 2.0 compatible device side to the USB host side. At this time, the USB 2.0 compatible device becomes in a state of waiting for a response from the USB host. When the USB host transits to the high-speed mode, the USB host alternately repeats a state (chirp K) in which the voltage of the D− signal becomes 800 mV and a state (chirp J) in which the voltage of the D+ signal becomes 900 mV, as shown in FIG. 7. Then, the USB bus again becomes in the SE0 state, and the reset ends, thereby the USB bus being in an idling state in the high-speed mode.
On the other hand, when the USB host does not detect alternate chirp K and chirp J after the transition section, which is after the chirp K by the USB 2.0 compatible device, as shown in FIG. 8, the USB 2.0compatible device recognizes that the reset is ended by the USB host that is compatible with the USB1.1 standard (hereinafter, “FS host”), Accordingly, the USB bus becomes in an idling state in the full-speed mode.
As shown in FIG. 7, in the handshaking during rest, there is a state that is called Tiny J (for example, “USB Hardware & Software, Japanese version”, written by John Garney, Ed Solari, Shelagh Callahan, Kosar Jaff, Brad Hosler, InfoCreate Co., Ltd., 1999). Tiny J is, as shown in FIG. 9, a state in which the voltage of the D+ signal becomes about 70 mV to 230 mV due to a pull-up resistor 21, pull-down resistors 11 and 12, and input/output terminals of a USB host 1 and a USB device 2 during USB reset.
However, in a conventional USB 2.0 compatible device, since its threshold level is from 100 mV to 150 mV, the following problem arises. When the D+ signal voltage becomes a value from about 70 mV to 230mV due to Tiny J in the handshaking during rest, the D+ signal that is originally at a low level is occasionally moved to a high level. Thus, the D+ signal becomes at the high level and the D− signal becomes at the low level. As a result, the USB 2.0 compatible device recognizes that the FS host is in the reset end state, and misrecognizes an HS host as the FS host. Accordingly, the USB 2.0 compatible device is connected to the HS host in the full-speed mode.